Renesas: reference design supports traffic in 100-Gb class

Renesas Electronics announced a packet header search reference design for 100 Gb communications devices such as routers, switches, and servers. The reference design is comprised of the LLDRAM-III (RMHE41A364AGBG) power-efficient, low-latency memory (LLDRAM), proprietary exact-match search IP, and LLDRAM-III controller IP on an FPGA device, and development support tools. It enables 100 Gb traffic packet header search functionality using 1/15th the number of memory devices than would be required in a configuration employing standard DRAM memory and reduces memory power consumption by 60 percent.

LLDRAM-III is a power-efficient type of low-latency memory from Renesas that supports 400 mega accesses (read or write operations) per second and consumes two watts or less to transfer 57.6 Gb of data. By combining this memory with the newly-developed search algorithm from Renesas, it is possible to process 150 million packet header searches per second, as required for 100 Gb Ethernet, using a single LLDRAM-III device. Performing the same processing with a configuration using a conventional search algorithm and standard DRAM would require around 15 memory devices and consume about five watts of power. The new reference design reduces the number of memory devices to a single LLDRAM-III memory and cuts memory power consumption by 60 percent. This shrinks the memory mounting area by 90 percent and also reduces the number of signal lines between the memory and FPGA by 90 percent, making it possible to configure the system using an FPGA with fewer pins and contributing to reduced overall cost.

The exact-match search IP allows the flexibility of changing the search key length in one-bit units up to a maximum of 143 bits. This makes it possible to accommodate not only conventional MAC address searches but also new communication protocols made possible by advances in network virtualization technology without having to modify the search IP design. Also, the number of search entries can be expanded to two million or even four million by specifying a shorter maximum search key (Note 6) length. This also includes functionality that supports simultaneous output of search results and packet processing rules when the maximum search key length of 143 bits is used, by dividing the search key area and the packet processing rule area appended to the search result.

The development support tools consist of a reference board with proven interoperability between the FPGA and LLDRAM-III, thereby saving time that would otherwise be needed for design and verification, sample design including search IP, a complete verification environment, and a complete evaluation environment. These tools enable users to begin FPGA subsystem design and network equipment design work in parallel, which significantly reduces the development cycle time by around six months (according to calculations by Renesas).

Renesas provides NSEs for the complex communication processing at the 200-Gb class used by external communication interfaces of data centers and backbone communication networks. For communication processing at 100 Gb and below, in applications within data centers having large numbers of ports, Renesas provides a packet header search reference design composed of LLDRAM-III and FPGA. With this new FPGA-based search solution that enables flexible communication and support for rapidly-advancing network technology, Renesas continues its commitment to the communications market with the development of new solutions.

More Information...

Latest News from Renesas

Renesas: Embedded virtualization technology for R-Car platform
Renesas adds three new MCU groups to Synergy platform
Renesas joins LoRa Alliance
Renesas: Synergy Platform Ecosystem adds Amazon Web Service IoT connectivity
Renesas accelerates industrial networking application development with RZ/N MPUs
Renesas: rotational flow demonstration kit based on RL78/I1D MCU
Renesas demonstrates efficient development of automotive embedded systems
Renesas: next-gen emulator contributes to reduced Embedded software development time
Renesas: dedicated motor control circuit technology for automotive MCUs
Renesas: fin-shaped MONOS Flash memory cells for MCUs in 16/14nm process nodes and beyond
Renesas extends software environment for TPS-1 PROFINET IRT device chip
Renesas: RL78/I1C MCUs support DLMS standard for smart meters
Renesas: RX71M Revelation Kit simplifies TFT display implementation
Renesas: PLC modem solution based on Synergy platform accelerates time to market
Renesas: 32-bit RX65N and RX651 MCUs provide safe and secure communication capability
Renesas: reduce development time for search offload engine in 400 Gbps network devices
Renesas: RL78/L1A MCUs feature built-in bio-sensing AFEs for healthcare
Renesas: general-purpose MCUs in 24-pin compact package support up to 13 sensors
Renesas: EtherCAT dedicated communication SoC for remote I/O slave applications
Renesas: contactless wireless charging solution for healthcare and wearable devices

WSI's OLED Professional innovations create more value for You.

WSI are the PMOLED manufacturer and our factory located in Chun-Nan in Taiwan. Our products are the market leader and pioneer in PMOLED module, including the monochrome, area colors and full color one...


SKIPPER UBT21 - a Bluetooth 4.0 USB serial adapter for industrial and medical use

SKIPPER UBT21 is a Bluetooth 4.0 USB serial adapter for industrial and medical use. It incorporates a Bluetooth Dual-Mode Stack, supports ranges of up to 300 meters and transferrates of 720 kbit/s (ne...


Three of a kind - Versatility based on Low Power ARM Cortex-A15

At this year's Embedded World, MEN has presented three low power, ARM Cortex-A15-based solutions on different form factors: a VMEbus SBC, an industrial box PC and a COM Express Mini module. All so...


Enabling Embedded IoT

Eurotech, a long-time leading provider of embedded systems and a global leader in IoT enablement, showed its new modules and Multi-service IoT Gateways at Embedded World 2017. The newly introduced Eu...


PLS’ UDE and new UAD2next allow more powerful trace analysis of embedded multicore systems

The new Universal Debug Engine 4.8 from PLS Development Tools offers a bunch of new and improved features for trace analysis of embedded multicore systems. With the new access device UAD2next PLS cont...


Disruptive technologies

Rahman Jamal, Global Technology & Marketing Director, National Instruments, talks about disruptive technologies in the consumer world, but also in measurement, automation, and the embedded industr...


AdaCore Announces Availability of QGen Debugger at Embedded World 2017

Jose Ruiz, technical lead at AdaCore for the company's QGen automatic code generator toolset for model-based development, discusses that product and explains what differentiates it from other prod...


SECO IoT roadmap: from the proof of concept to the market

During Embedded World 2017 Gianluca Venere, SECO Director of Global Sales, leads us to discover the company's Industrial IoT roadmap showcased at SECO's main booth, along with the latest UDOO ...


Internet of Chocolate

HCC show off an embedded chocolate vending machine using MQTT to connect to a broker in the cloud. There is an important message behind this cool demo – security and reliability of embedded soft...