Lattice: reference designs support LoRa communication and ECC security
Lattice Semiconductor announced the availability of new reference designs based on its iCE40 UltraPlus FPGA devices to address emerging market requirements and to enable an expedited product development cycle. Expanding one of the industry’s most energy-efficient and programmable mobile influenced solutions, Lattice’s new reference designs for the iCE40 UltraPlus support LoRa communication, elliptic curve cryptography security, signal aggregation, machine learning and graphics acceleration.
With these new reference designs, customers are equipped with additional resources to accelerate the development of differentiated and innovative products. The iCE40 UltraPlus is a highly energy-efficient computing solution for sensor stitching and repetitive number crunching, making it ideal for offloading power hungry application processors in battery-powered devices. Lattice’s small form factor, low cost and low power FPGAs offer enhanced memory and more DSPs to improve system performance and extend battery life.
Built upon existing IP and paired with the new reference designs, the iCE40 UltraPlus anchors a complete solution for enabling sensor-to-Cloud security and acceleration at the Edge. It is essential for performing functions such as data capturing, aggregation, encryption, processing and transmission.
The iCE40 UltraPlus is the latest addition to the iCE40 Ultra family, delivering eight times more memory (1.1 Mbit RAM), twice the digital signal processors (8x DSPs), and improved I/Os over previous generations.