Silicon Labs tackles high-speed transceiver clocking with new crystal oscillators

Silicon Labs has introduced a new family of high-performance I2C-programmable crystal oscillators with typical jitter performance as low as 95 femtoseconds. The Si544/Si549 Ultra Series programmable XOs maximize jitter margin for clocking high-speed 28 Gbps and 56 Gbps transceivers used in 100/200/400G communications and data center applications. The devices are capable of generating any frequency from 200 kHz to 1.5 GHz with no frequency gaps and 4 parts-per-trillion tuning resolution, enabling a single device to be used across a broad spectrum of applications.

The Si544/Si549 XOs support up to four preset, pin-selectable start-up frequencies. After power-up, the device operating frequency can easily be changed via an I2C interface. This configuration flexibility enables a single oscillator to replace multiple single, dual and quad-frequency XOs and multiplexer (mux) devices with a single oscillator. The device can be powered from a single 1.8, 2.5 or 3.3 V supply, eliminating the need for different XO part numbers for different supply voltages. The Si54x XO’s I2C interface supports update rates as high as 1 MHz (Fast-mode Plus), maximizing compatibility with a broad range of ASSPs, ASICs, SoCs and FPGAs.

The Si544/Si549 XOs are available in 3.2 x 5 and 5 x 7 mm packages, providing superior frequency flexibility in the same footprint as a standard, fixed-frequency XO. This compatibility enables hardware designers to prototype with an I2C-programmable XO and easily migrate to a single-frequency XO when the design transitions to production.

The Si54x XOs are purpose-built for 56 Gbps transceiver designs. These designs rely on pulse-amplitude modulation (PAM4) signalling for serial data transmission. PAM4 uses four-level signalling to increase the bit rate per channel while keeping the bandwidth constant. This tradeoff makes the design inherently more susceptible to noise. Using an ultra-low-jitter reference clock such as the Si544/Si549 devices maximizes signal-to-noise ratio (SNR) headroom, helps prevent bit-errors and helps maintain signal integrity.

The Si544/Si549 oscillators use Silicon Labs’ advanced fourth-generation DSPLL technology to provide an ultra-low-jitter clock source at any output frequency. The devices are programmable to any frequency from 200 kHz to 1.5 GHz with 4 ppt resolution. On-chip power supply regulation provides power supply noise rejection, enabling consistent, reliable low-jitter operation in noisy environments often found in high-speed networking and data centers. The Si544/Si549 XOs also provide flexible, reliable drop-in replacements for low-jitter surface acoustic wave (SAW)-based oscillators while offering superior frequency tolerance and temperature stability. The Si544/Si549 oscillators support all popular output formats including LVDS, LVPECL, HCSL, CML, CMOS and Dual CMOS.

In addition to the Si544/Si549 family, Silicon Labs is significantly expanding its XO/VCXO portfolio to include a broader array of package options. These complementary products include Si54x Ultra Series XOs in the industry-standard 5 x 7 mm package, Si59x general-purpose XO/VCXOs (3.2 x 5 mm) and Si51x general-purpose XO/VCXOs (2.5 x 3.2 mm). With this expanded product lineup, Silicon Labs can provide customers with a one-stop shop for high-performance oscillators.


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